Shakti - The First Indigenous Indian Microprocessor & Microcontroller.
Shakti is the first opensource initiative taken by the Indian Institute of Technology, Madras to develop the first indigenous industrial-grade processor based on RISC-V architecture. The whole project was developed by RISE group at IIT Madras, with assistance from Intel corporation. The shakti project is based on 22nm FinFET technology.
All the source codes for SHAKTI are open-sourced under Modified BSD License of the University of California, Berkeley. Which means the source code is royalty and patent-free. Anyone can use, modify and distribute the code as long as it meets the license terms.
If you don’t know the difference between a microprocessor and microcontroller, then read below link.
The SHAKTI project aims to build 6 variants of processors based on the RISC-V ISA.
Base Class Of Processors
The E-class is a 32/64 bit embedded class processor aimed at low-power and low compute applications with a clock frequency of less than 200MHz. It’s capable of running real-time operating systems like FreeRTOS, Zephyr and eChronos. Market segments of E-class processor support Smart-cards, IoT devices, motor controls and robotic platforms.
The C-class is a 64-bit controller class of processor, aimed at mid-range embedded application. The core is highly optimized, 6-stage in-order design with MMU support and capability to run operating systems like Linux and Sel4. C-class targets compute/control applications in the 0.5 to 1.5 GHz range. It’s extremely configurable with the support of the standard RV64GC ISA extensions. The application domain of this class ranges from embedded systems, motor-control, IoT, storage, industrial applications to low-cost high-performance Linux based applications such as networking, gateways etc.
The I-class is a 64-bit processor which targets the compute, mobile, storage and networking platforms. Its features include out-of-order execution, multithreading, aggressive branch prediction, non-blocking caches and deep pipeline stages. The operational clock frequency of this processor is 1.5-2.5 GHz.
A mobile class processor with a maximum of 8 cores, the cores being a combination of C and I class cores. The M-class processors are aimed at general-purpose compute, low-end server and mobile applications. The operation frequency ranges up to 2.5 GHz. Its supports large issue size, quad-threaded & optional NoC fabric.
The S-Class is a 64-bit superscalar,multi-threaded variant aimed at Desktop and Enterprise server Application. Its supports 2-16 cores with a clock frequency of about 1.2-3 GHz.
The H-class is a 64-bit processor aimed at highly parallel enterprise, HPC and analytics applications. The cores can be a combination of C or I class, single-thread performance driving the core choice. The H-class has up to 128 cores with multiple accelerators per core.
The T-class and F-class processors are experimental processors aimed at developing secure and fault-tolerant systems for mission-critical applications.
The T-class is aimed to provide additional hardware support for securing information from memory-based attacks. Its design focus on a unified hardware framework for mitigating spatial and temporal memory attacks
The F-class is a fault-tolerant version of the base class processor. Features include redundant compute blocks (like DMR and TMR), temporal redundancy modules to detect permanent faults, lock-step core configurations, fault localization circuits, ECC for critical memory blocks and redundant bus fabrics.